Non-volatile memories (NVM) are gaining more attention due to the capability of retaining of information even when power is turned off. Spin transfer torque magnetoresistive random access memory (STT-MRAM) is considered as a promising candidate for the next generation of non-volatile memory. STT-MRAM has the advantages of scalability, high endurance, high speed and low energy consumption.
In order for MRAM to be industrially viable, it is desirable to increase the memory storage density of MRAM devices. One way of increasing memory storage density in STT-MRAM devices is to have a multi-bit per cell (MBPC) design. Circuits for writing and sensing the single bit STT-MRAM devices might not be suitable for STT-MRAM with MBPC design.
Therefore, it is desirable to provide write and sense circuitries of STT-MRAM with MBPC design.